Data memory cells based on materials where the phase state can change (PCRAMs) represent a promising new technology that may possibly replace technologies that are currently standard, such as DRAM and flash memories (see, e.g., B. Prince, Emerging Memories, Technologies and Trends, Kluwer Academic Publishers, 2002). In this type of memory cells, the phase state (amorphous or crystalline) of a chalcogenide-containing material (typically Ge—Sb—Te or Ag—In—Sb—Te compounds) is used to store a data bit. The fact that the amorphous and crystalline phases of these compounds differ significantly in terms of their electrical conductivity is exploited to read the information.
A cell which is in the amorphous (high-resistance) state is programmed into the crystalline phase (low-resistance) by an electric current pulse heating the material to above the crystallization temperature by Joule heat, enabling the material to (partially) crystallize. The memory cell is reset or erased by the material being heated to above the melting point, which is higher than the crystallization temperature, by a second current pulse, and then converting it into the amorphous state by rapid cooling.
One of the main technical problems in implementing this technology is that high current densities are required for both the writing operation and the erasing operation. This results from the quantity of Joule heat which is required to heat the active material to above the crystallization temperature or melting point. However, when a cell of this type is integrated in a silicon CMOS process with advanced miniaturization, there are limits on the level of current densities that can be used. For example, if the currents required to operate a PCRAM cell of this type are higher than the currents which a single CMOS transistor of minimum feature size is able to withstand, the PCRAM is no longer able to realize a compact cell array with a competitive cell area. Furthermore, a further reduction in the current is desirable from the perspective of the particular applications, since the energy consumption is then reduced and/or highly parallel programming of the cells becomes possible.
Since the quantity of heat which is required to program a memory cell of a PCRAM memory, and therefore also the current, are proportional to the volume of glass which is transformed, various strategies are generally being pursued with a view to minimizing the spatial dimensions of the active material which is to be transformed. In recent years, many tests have been undertaken with a view to reducing the contact surface area between at least one metallic electrode and the active material of a PCRAM memory cell by lithography or by suitable layout. Examples include the structures produced by a laser process as shown by Samsung at the NVSMW 2003 (Y. N. Hwang et al., Completely CMOS compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors, IEEE Proceedings of the Non-Volatile Semiconductor Memory Workshop, 2003), or what is known as the etch cell, in which the interface with the active material is horizontal in form (e.g., G. Wicker, Nonvolatile High density, High Performance Phase Change Memory, SPIE Conference on Electronics and Structures for MEMS, Vol. 3891, 1999).
Despite a significant reduction in the programming and erasing currents, the techniques which have been disclosed hitherto are still far from achieving the target specifications or desirable maximum currents.